RESSAC_Use_Case

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Author	SHA1	Message	Date
AP Porte	c8d122e3e6	2017 dec 14th changes move error classes and means from synthesis table defined in group on dec 13th into the sections; remains to define inputs/outputs	7 years ago
AP Porte	cf06e94c76	dec 13th meeting added a synthesis table for system definition to cover all activities and the error classes they introduce, to clarify need to add in each chapter - inputs/outputs of each activity - details of each activity - complete the error classes of each activity from the synthesis table synthesis table to remove from document when activities descriptions are complete.	7 years ago
AP Porte	027f035513	december meeting 13/12 after exchange	7 years ago
fpothon	def6bfa151	Add files via upload	7 years ago
AP Porte	ff1290968d	Add files via upload add a summary of last discussion of nov 16th meeting	7 years ago
AP Porte	307a9f7634	process diagram changed	7 years ago
AP Porte	25cbda2e6c	added SW integration process - to complete	7 years ago
AP Porte	892a2e5da3	update on 2017/11/15 afternoon added software processes	7 years ago
AP Porte	a8849a15a3	Result of workshop 2017/11/15 morning add schema behavioral model simulations error classes	7 years ago
fpothon	5bc4b40806	Updated on 2017 November 14, day 1 Resac meeting	7 years ago
SylvanDissoubray	70883242d4	Add files via upload Working session APP/SD	7 years ago
CyrilleComar	b914e6c263	reorg big reorganization agreed during 2017-10-26	7 years ago