Commit Graph

68 Commits

Author SHA1 Message Date
ThalesAV
dac0af6dfc Add files via upload 2018-04-24 18:07:58 +02:00
pfarail
ef27268d42 New form
application of IRT form and Open source license
2018-04-17 09:20:41 +02:00
pfarail
c5955b8af6 New form
application of IRT form and Open source license
2018-04-17 09:20:22 +02:00
pfarail
023cb41694 New form
application of IRT form and Open source license
2018-04-17 09:20:08 +02:00
pfarail
7e34d5d3b5 New form
application of IRT form and Open source license
2018-04-17 09:19:48 +02:00
pfarail
9f76569bbe New form
application of IRT form and Open source license
2018-04-17 09:19:31 +02:00
pfarail
fa291140c1 New IRT form
application of IRT form and Open source license
2018-04-17 09:19:11 +02:00
pfarail
f1d7b6bcba relocation old version
Relocated to OLD folder
2018-04-17 09:18:15 +02:00
pfarail
548bc4a139 Relocation old version
Relocated to OLD folder
2018-04-17 09:17:58 +02:00
pfarail
cc471e70ff Relocation old version
Relocated to OLD folder
2018-04-17 09:17:45 +02:00
pfarail
b224a08f58 Relocated old version
relocated to OLD folder
2018-04-17 09:17:20 +02:00
pfarail
6326eeda35 Reloation of old version
Relocated to OLD folder
2018-04-17 09:16:41 +02:00
pfarail
a3e4958c58 Relocation old version
Relocated to Old folder
2018-04-17 09:16:19 +02:00
pfarail
4273d702ab Creation of the folder
Folder which receives old versions of document
2018-04-17 09:15:17 +02:00
pfarail
a18421bf0d Delete Case study Multisystem Integration.doc
Error in the name of the document for the new version
2018-03-29 11:32:50 +00:00
Emmanuel Ledinot
d4c9311445 Add files via upload
A process pattern to address tiers of decomposition.
Illustrated on muXAV, when the multi-system specification is decomposed into system specifications.
Focus on  functional safety assurance.
2018-03-03 16:03:57 +01:00
ThalesAV
a4026cc89c Add files via upload 2018-02-26 13:57:05 +01:00
HerveDelseny
049bfbe398 Add files via upload 2018-02-15 11:35:41 +01:00
HerveDelseny
75c579f51f Add files via upload 2018-02-15 08:59:59 +01:00
HerveDelseny
eb7eb92349 Add files via upload 2018-02-14 11:57:14 +01:00
fpothon
8a717e7248 Add files via upload 2018-02-14 09:49:58 +01:00
pfarail
876e1c798a Finalisation of the use case description from FP 2018-02-13 15:08:35 +01:00
Emmanuel Ledinot
58c28347d3 Delete Case study Multisystem Integration.doc.doc 2018-02-13 00:38:53 +00:00
Emmanuel Ledinot
a3ba6c20a5 Add files via upload 2018-02-13 01:38:10 +01:00
Emmanuel Ledinot
7d458bb3ed Add files via upload 2018-02-13 01:36:40 +01:00
fpothon
c9cc833fc3 Add files via upload 2018-01-30 14:15:15 +01:00
HerveDelseny
8933abb375 Delete Case study template FPGA Development_2.doc
File renamed in Case Study FPGA Development
2018-01-19 15:34:40 +00:00
MiguelDeAlmeida
3d7f65fce0 Add files via upload 2018-01-19 14:39:24 +01:00
MiguelDeAlmeida
e57b96aa32 Add files via upload 2018-01-11 14:34:53 +01:00
MiguelDeAlmeida
25363477d6 Delete Case study template Soc Development.doc 2018-01-11 13:34:02 +00:00
ThalesAV
1ac44805e3 Add files via upload 2018-01-11 11:43:49 +01:00
ThalesAV
1b2aa52b71 Delete Case Study HW COTS AEH_Process Description_1.2.1.doc 2018-01-11 10:42:11 +00:00
ThalesAV
8b2dcb6a73 Delete Case Study HW COTS AEH_Properties Mapping_1.1.0.doc 2018-01-11 10:41:39 +00:00
AP Porte
61ae698055 update during january 11th meeting 2018-01-11 11:35:30 +01:00
ThalesAV
1ee652880b Delete Case Study HW COTS AEH.doc 2018-01-11 10:29:36 +00:00
ThalesAV
d224b4bd5b Delete Case Study HW COTS AEH selection__process_1.1.doc 2018-01-11 10:28:23 +00:00
ThalesAV
b7513db80c Add files via upload 2018-01-11 11:25:01 +01:00
fpothon
7f182ab2cb Add files via upload 2018-01-10 15:55:51 +01:00
AP Porte
c14d7900a0 ressac meeting january 9th 2018-01-09 18:14:55 +01:00
Anthony Leonardo Gracio
cfd1c3007d Update the Case study SPARK document
In particular define more precisely what are the SPARK global contracts
and specify which errors can be found (and how) during the different
phases of the project (software requirements development, etc.).
2018-01-08 17:15:48 +01:00
AP Porte
b1e1b28dcd update of the software model process definition in preparation of the january meeting 2018-01-08 15:28:32 +01:00
fpothon
27701e9d4b Add files via upload 2017-12-29 11:07:14 +01:00
fpothon
b3ba4d5e81 Add files via upload 2017-12-15 16:40:48 +01:00
AP Porte
d474d6ae5d dec 14th commit
advanced in group on 
 - inputs/outputs of system processes, in the synthesis table; to move to the sections
 - information in the software development processes
2017-12-14 15:05:31 +01:00
MiguelDeAlmeida
42bead4a42 Add files via upload 2017-12-14 14:44:23 +01:00
HerveDelseny
54edb3cc12 Another step after Dec17 workshop
Context part, scheme, and 1st activity have been reviewed and improved => next step consists in continuing description of the other activities in the same way.
2017-12-14 12:34:48 +01:00
AP Porte
c8d122e3e6 2017 dec 14th changes
move error classes and means from synthesis table defined in group on dec 13th into the sections;
remains to define inputs/outputs
2017-12-14 10:22:14 +01:00
AP Porte
cf06e94c76 dec 13th meeting
added a synthesis table for system definition to cover all activities and the error classes they introduce, to clarify
need to add in each chapter 
 - inputs/outputs of each activity
 - details of each activity
 - complete the error classes of each activity from the synthesis table
synthesis table to remove from document when activities descriptions are complete.
2017-12-13 17:29:36 +01:00
AP Porte
027f035513 december meeting 13/12
after exchange
2017-12-13 16:03:15 +01:00
fpothon
57747a4300 Add files via upload 2017-12-13 11:39:41 +01:00