1. 11 Jan, 2018 4 commits
  2. 10 Jan, 2018 3 commits
  3. 09 Jan, 2018 1 commit
  4. 08 Jan, 2018 8 commits
  5. 29 Dec, 2017 1 commit
  6. 15 Dec, 2017 1 commit
  7. 14 Dec, 2017 4 commits
    • AP Porte's avatar
      dec 14th commit · d474d6ae
      AP Porte authored
      advanced in group on 
       - inputs/outputs of system processes, in the synthesis table; to move to the sections
       - information in the software development processes
      d474d6ae
    • MiguelDeAlmeida's avatar
      Add files via upload · 42bead4a
      MiguelDeAlmeida authored
      42bead4a
    • HerveDelseny's avatar
      Another step after Dec17 workshop · 54edb3cc
      HerveDelseny authored
      Context part, scheme, and 1st activity have been reviewed and improved => next step consists in continuing description of the other activities in the same way.
      54edb3cc
    • AP Porte's avatar
      2017 dec 14th changes · c8d122e3
      AP Porte authored
      move error classes and means from synthesis table defined in group on dec 13th into the sections;
      remains to define inputs/outputs
      c8d122e3
  8. 13 Dec, 2017 3 commits
    • AP Porte's avatar
      dec 13th meeting · cf06e94c
      AP Porte authored
      added a synthesis table for system definition to cover all activities and the error classes they introduce, to clarify
      need to add in each chapter 
       - inputs/outputs of each activity
       - details of each activity
       - complete the error classes of each activity from the synthesis table
      synthesis table to remove from document when activities descriptions are complete.
      cf06e94c
    • AP Porte's avatar
      december meeting 13/12 · 027f0355
      AP Porte authored
      after exchange
      027f0355
    • fpothon's avatar
      Add files via upload · 57747a43
      fpothon authored
      57747a43
  9. 12 Dec, 2017 1 commit
  10. 07 Dec, 2017 1 commit
    • SylvanDissoubray's avatar
      Add files via upload · 06608876
      SylvanDissoubray authored
      An initial version of SysML SCADE Architect MMS Architecture DRAFT. This report will be merged into RESSAC_muXAV_SystemRQ_MMS_SW_Incr1.doc.
      06608876
  11. 29 Nov, 2017 2 commits
  12. 16 Nov, 2017 6 commits
  13. 15 Nov, 2017 5 commits