Commit Graph

128 Commits

Author SHA1 Message Date
Emmanuel Ledinot
58c28347d3 Delete Case study Multisystem Integration.doc.doc 2018-02-13 00:38:53 +00:00
Emmanuel Ledinot
a3ba6c20a5 Add files via upload 2018-02-13 01:38:10 +01:00
Emmanuel Ledinot
7d458bb3ed Add files via upload 2018-02-13 01:36:40 +01:00
Emmanuel Ledinot
152a557136 Add files via upload 2018-02-13 01:34:27 +01:00
SylvanDissoubray
197a95f39c Add files via upload
File MMS-SRATS_in-progress.docx is a current rework of MMS system Specification, with reorganized contents, tags, and a few remining issues not solved.
2018-02-08 16:19:55 +01:00
SylvanDissoubray
67624be974 Add files via upload
Folder muXAV_v3_removed_propagation_across contains a SysML SCADE Architect model of muXAV wdetailed on the MMS part. Data are propagated but not through F_CM where data change needs to be represented in model. This model is starting point candidate to refine organic architecture by  an AADL model (the SysML model can contain plain SCADE Architect and SCADE AADL models in same model but dedicated packages).
2018-02-08 16:17:22 +01:00
SylvanDissoubray
c68a89b6b8 Add files via upload
Folder MMS contans SCADE Suite MMS model (essentially F_FC, flight control parts).
MMS_Interface_Synchro contains the MMS top level synchronization between SCADE Suite and SCADE Architect
2018-02-08 16:09:27 +01:00
fpothon
c491b3079e Add files via upload 2018-02-08 15:11:56 +01:00
fpothon
c9cc833fc3 Add files via upload 2018-01-30 14:15:15 +01:00
HerveDelseny
8933abb375 Delete Case study template FPGA Development_2.doc
File renamed in Case Study FPGA Development
2018-01-19 15:34:40 +00:00
MiguelDeAlmeida
3d7f65fce0 Add files via upload 2018-01-19 14:39:24 +01:00
MiguelDeAlmeida
e57b96aa32 Add files via upload 2018-01-11 14:34:53 +01:00
MiguelDeAlmeida
25363477d6 Delete Case study template Soc Development.doc 2018-01-11 13:34:02 +00:00
ThalesAV
1ac44805e3 Add files via upload 2018-01-11 11:43:49 +01:00
ThalesAV
1b2aa52b71 Delete Case Study HW COTS AEH_Process Description_1.2.1.doc 2018-01-11 10:42:11 +00:00
ThalesAV
8b2dcb6a73 Delete Case Study HW COTS AEH_Properties Mapping_1.1.0.doc 2018-01-11 10:41:39 +00:00
AP Porte
61ae698055 update during january 11th meeting 2018-01-11 11:35:30 +01:00
ThalesAV
1ee652880b Delete Case Study HW COTS AEH.doc 2018-01-11 10:29:36 +00:00
ThalesAV
d224b4bd5b Delete Case Study HW COTS AEH selection__process_1.1.doc 2018-01-11 10:28:23 +00:00
ThalesAV
b7513db80c Add files via upload 2018-01-11 11:25:01 +01:00
fpothon
7f182ab2cb Add files via upload 2018-01-10 15:55:51 +01:00
CyrilleComar
b818933ee6 add General_Info dir
this is for external communication purposes.
2018-01-10 09:33:40 +01:00
CyrilleComar
be71dd52f0 Perrine"s Readme
move README to new organization
2018-01-10 09:33:40 +01:00
AP Porte
c14d7900a0 ressac meeting january 9th 2018-01-09 18:14:55 +01:00
Emmanuel Ledinot
1007b2dcb5 Add files via upload 2018-01-08 23:54:54 +01:00
Emmanuel Ledinot
5ec315e6ee Add files via upload 2018-01-08 23:54:03 +01:00
Emmanuel Ledinot
f54b89557b Add files via upload 2018-01-08 23:53:14 +01:00
Emmanuel Ledinot
cb99f6b889 Add files via upload 2018-01-08 23:52:24 +01:00
Anthony Leonardo Gracio
fbdcf37b22 Fix typo 2018-01-08 17:15:48 +01:00
Anthony Leonardo Gracio
cfd1c3007d Update the Case study SPARK document
In particular define more precisely what are the SPARK global contracts
and specify which errors can be found (and how) during the different
phases of the project (software requirements development, etc.).
2018-01-08 17:15:48 +01:00
Anthony Leonardo Gracio
561c1a93bd Fix ambiguities and typos (first step) 2018-01-08 17:15:48 +01:00
AP Porte
b1e1b28dcd update of the software model process definition in preparation of the january meeting 2018-01-08 15:28:32 +01:00
fpothon
27701e9d4b Add files via upload 2017-12-29 11:07:14 +01:00
fpothon
b3ba4d5e81 Add files via upload 2017-12-15 16:40:48 +01:00
AP Porte
d474d6ae5d dec 14th commit
advanced in group on 
 - inputs/outputs of system processes, in the synthesis table; to move to the sections
 - information in the software development processes
2017-12-14 15:05:31 +01:00
MiguelDeAlmeida
42bead4a42 Add files via upload 2017-12-14 14:44:23 +01:00
HerveDelseny
54edb3cc12 Another step after Dec17 workshop
Context part, scheme, and 1st activity have been reviewed and improved => next step consists in continuing description of the other activities in the same way.
2017-12-14 12:34:48 +01:00
AP Porte
c8d122e3e6 2017 dec 14th changes
move error classes and means from synthesis table defined in group on dec 13th into the sections;
remains to define inputs/outputs
2017-12-14 10:22:14 +01:00
AP Porte
cf06e94c76 dec 13th meeting
added a synthesis table for system definition to cover all activities and the error classes they introduce, to clarify
need to add in each chapter 
 - inputs/outputs of each activity
 - details of each activity
 - complete the error classes of each activity from the synthesis table
synthesis table to remove from document when activities descriptions are complete.
2017-12-13 17:29:36 +01:00
AP Porte
027f035513 december meeting 13/12
after exchange
2017-12-13 16:03:15 +01:00
fpothon
57747a4300 Add files via upload 2017-12-13 11:39:41 +01:00
fpothon
def6bfa151 Add files via upload 2017-12-12 17:25:49 +01:00
SylvanDissoubray
066088761f Add files via upload
An initial version of SysML SCADE Architect MMS Architecture DRAFT. This report will be merged into RESSAC_muXAV_SystemRQ_MMS_SW_Incr1.doc.
2017-12-07 17:14:24 +01:00
HerveDelseny
109b6e1f0a Add files via upload 2017-11-29 10:27:48 +01:00
HerveDelseny
28533433f9 Add files via upload 2017-11-29 10:25:05 +01:00
AP Porte
ff1290968d Add files via upload
add a summary of last discussion of nov 16th meeting
2017-11-16 18:05:05 +01:00
AP Porte
307a9f7634 process diagram changed 2017-11-16 15:48:23 +01:00
HerveDelseny
80dcc15d1e Add files via upload 2017-11-16 14:25:47 +01:00
HerveDelseny
0c9150d646 Delete Case Study HW COTS AEH -16 Nov 2017.doc 2017-11-16 14:23:17 +01:00
AP Porte
25cbda2e6c added SW integration process - to complete 2017-11-16 14:22:42 +01:00